Which bits would be used for tag, index, and offset in address reference? What is the expected access time for the following cache configuration? Additional Primary or Secondary cache could be added at same cost - which would be the better addition?

1. Answer the following questions related to reference addresses:

a. Given a 64-byte cache block, a 4 KB direct-mapped cache (assume byte-addressable), and a 32 bit address reference, which bits would be used for tag, index, and offset?

b. Given a 64-byte cache block, a 32 KB direct-mapped cache (assume byte-addressable) and a 32 bit address reference, which bits would be used for tag, index, and offset?

c. Given a 64-byte cache block, a 512 KB fully associative cache (assume byte-addressable), and a 32 bit address reference, which bits would be used for tag, index, and offset?

d. Given a 128-byte cache block a 2 MB 8-way set associative cache (assume byte-addressable, and a 64 bit address reference, which bits would be used for tag, index, and offset (note that `way' denotes the number of blocks)?

2. Answer the following questions:

a. What is the expected access time for the following cache configuration: Primary Cache: access time, 1 cycle; hit ratio, 80% Secondary Cache: access time, 10 cycles; hit ratio, 96% Memory: access time, 100 cycles.

b. Additional Primary or Secondary cache could be added at same cost. If additional primary cache results in a 92% hit rate and additional secondary cache results in 97% hit rate, which would be the better addition?

© SolutionLibrary Inc. solutionlibary.com 9836dcf9d7 https://solutionlibrary.com/computer-science/software-development/which-bits-would-be-used-for-tag-index-and-offset-in-address-reference-what-is-the-expected-access-time-for-the-following-cache-configuration-additional-primary-or-secondary-cache-could-be-added-7fuf

Solution Preview

...is split up into tag bits and offset bits only, because all the address references map to the same set consisting of all the cache blocks (8192 blocks in current case. 512 KB/64 bytes = 8192).

Offset bits = lg(size of cache block in bytes) = lg(64) = 6 bits (bits 0:5)
Tag bits = 32 - 6 = 26 bits (bits 6:31).

Offset bits are subtracted from 32 because the address reference is 32 bits.

[1d]
Offset bits = lg(size of cache block in bytes) = lg(128) = 7 bits (bits 0:6)

Total number of cache blocks in the cache = 2 MB/128 bytes = 16384
Total number of sets in the cache (S) = 16384/8 = 2048

Total number of cache blocks are divided by size of set (8, due to 8-way associativity) to obtain ...